The present invention relates to a bus control gate array and, more particularly, to a mask programmable communications bus control gate array that can be customized for use between two disparate communications channels.
In the data processing field, communications buses and channels generally allow components and devices having similar or identical electrical characteristics to communicate with one another. But it is also often necessary to allow devices or components that have predetermined electrical properties to communicate with other devices having other predetermined electrical properties.
When larger computer systems include subsystems that communicate with one another, there has been a problem in allowing one bus to communicate with another bus having disparate electrical characteristics. For example, high performance, high speed systems comprising processors, for example, are often adapted to operate under the so-called emitter coupled logic (ECL) electrical standard; whereas lower performance, slower devices, such as certain peripheral equipment (e.g., printers, modems, mass storage devices and the like) tend to be adapted for transistor to transistor logic (TTL) electrical standards. Therefore, in order for a high performance, high speed processor operating under ECL standards to communicate with a lower performance, slower mass storage device operating under TTL standards, a mechanism to facilitate such communications between disparate communications channels had to be developed.
Heretofore, the apparatus used to allow devices on two disparate communications channels to communicate with one another has represented a unique, non-standardized approach for each application. The lack of standards obligated every computer manufacturer to solve this problem by devising a unique and individual solution. In many cases, these solutions required a number of individual components and connections between them, which connections often lead to a degradation of data integrity. Physical size of the components and the number thereof were appreciable. Thus, the cost of producing an interface was high, due to the number of components and amount of spaced required to house them. Power requirements were also elevated. Moreover, the amount of time required to translate data or information from one of the communications channels to a form compatible with another communications channel was also significant.
The components that were used to fabricate an interface were often off-the-shelf, standard components, preventing designers from constructing systems with the greatest flexibility. In other words, designers constrained to use off-the-shelf components could build in only the functions that could be used therewith.
It would be advantageous to provide a system for interfacing between two disparate channels.
It would also be advantageous to provide a system for interfacing for use with two disparate communications channels that would be cost effective.
It would also be advantageous to provide a system for interfacing that would be integrated on one integrated circuit chip.
It would also be advantageous to provide a system for providing an interface that could be customized according to the specific requirements of a user.
It would also be advantageous to provide a system for interfacing that would require relatively low power consumption.
It would also be advantageous to provide a system for interfacing between two communications channels that would require a minimal number of components.
It would also be advantageous to provide a system for interfacing whose operation would be time efficient.
It would also be advantageous to provide a system for interfacing between two communications channels that would require a minimum amount of physical space.
It would also be advantageous to provide a system for interfacing between two communications channels that would allow for data or information storage and/or manipulation, including error detection functions.